The excitation table is similar to the characteristic table that we discussed on flip-flops. The excitation table lists the present state, the desired next state and the flip-flop inputs (J, K, D, etc.) required to achieve that.
The same for a J-K flip-flop and a D flip-flop are shown in Tables 11.7 and 11.8 respectively. Referring to Table 11.7, if the output is in the logic ‘0’ state and it is desired that it goes to the logic ‘1’ state on occurrence of the clock pulse, the J input must be in the logic ‘1’ state and the K input can be either in the logic ‘0’ or logic ‘1’ state.
This is true as, for a ‘0’ to ‘1’ transition, there are two possible input conditions that can achieve this. These are J = 1, K = 0 (SET mode) and J = K = 1 (toggle mode), which further leads to J = 1# K = X (either 0 or 1). The other entries of the excitation table can be explained on similar lines.
In the case of a D flip-flop, the D input is the same as the logic status of the desired next state. This is true as, in the case of a D flip-flop, the D input is transferred to the output on the occurrence of the clock pulse, irrespective of the present logic status of the Q output.
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